Structured ASICs: The Preferred Design Solution For The Future

SUMMARY

This report presents an updated, and more in depth, analysis of the structured ASIC market, also referred to as the modular array, platform ASIC and structured array, to name just a few. The MOS gate array market is segmented into three major sub-categories: Conventional Gate Array, Embedded Array (or array embedded into a cell-based design), and the structured ASIC. The technology is targeted at the increasing rift being created between high-cost and lower performance programmable logic, and the higher-performance, high-cost, standard cell design approach. Current projections for the structured ASIC market; a 144.9% CAGR between 2002 and 2007, or, from a dollar perspective, dollar shipment value will grow at an almost incredible pace, increasing from $5.2 million in 2002 to $460.3 million by 2007.

This report analyzes the many factors that will cause this technology to increase in value, at a near record pace. Examined in the report is the relationship between the three major ASIC/Array market segments, of which only one will grow in the future. A detailed examination is also conducted relative to both major and secondary end-use markets, as well as geographic consumption. We also take a brief look at the major functions that are embedded, either hard or soft, into these designs. In addition, there is a somewhat detailed look at the various player offerings, as well as operating voltage, packaging and mixed-signal trends.

TABLE OF CONTENTS

• Executive Summary
• Methodology
• ASIC/Array Technical Overview
  • Conventional Gate Array
  • Embedded Array
  • Structured ASIC
• Market Overview
  • ASIC/Array Market Overview
  • Structured ASIC Market Overview
• Structured ASIC End-Use Consumption
  • Major Structured ASIC Second Level End-Use Consumption
• Structured ASIC Geographic Consumption
• Structured ASIC Major Diffused Functions
• Structured ASIC Suppliers
• Appendix I
  • Operating Voltage
  • Packaging
  • Functional Classification

List of Tables

• Table 1. MOS Array-Based and Structured ASIC Worldwide MerchantMarket Dollar Shipments By Major Category
• Table 2. Structured ASIC And Total MOS Gate Array Worldwide Dollar Shipments Comparison
• Table 3. Structured ASIC Worldwide Dollar Shipments By Design Rule Category
• Table 4. Structured ASIC End-Use Consumption - Total Market
• Table 5. Major Structured ASIC Second Level End-Use Consumption
• Table 6. Structured ASIC Geographic Consumption
• Table 7. Structured ASIC Suppliers
• Table 8. Structured ASIC Worldwide Merchant Market Dollar Shipments By Operating Voltage Category
• Table 9. Structured ASIC Worldwide Merchant Market Dollar Shipments By Package Category
• Table 10. Structured ASIC Worldwide Merchant Market Dollar Shipments By Functional Classification

  List of Figures

• Figure 1. Structured ASIC Worldwide Merchant Market Dollar Shipments
• Figure 2. Gate Array Functional Block Diagram - 4-Input NAND Gate
• Figure 3. Embedded Array - Architecture Examples
• Figure 4. Example of a Structured ASIC
• Figure 5. MOS Array-Based and Structured ASIC Worldwide Merchant Market Dollar Shipments By Major Category
• Figure 6. Structured ASIC And Total MOS Gate Array Worldwide Dollar Shipments Comparison
• Figure 7. Structured ASIC Worldwide Dollar Shipments By Design Rule Category
• Figure 8. Structured ASIC Worldwide Design Starts
• Figure 9. Structured ASIC Average Gate Density Per Design
• Figure 10. Structured ASIC End-Use Consumption - Total Market
• Figure 11. Major Structured ASIC Second Level End-Use Consumption
• Figure 12. Structured ASIC Geographic Consumption
• Figure 13. Structured ASIC Major Embedded Functions
• Figure 14. Structured ASIC Worldwide Merchant Market Dollar Shipments By Operating Voltage Category
• Figure 15. Structured ASIC Worldwide Merchant Market Dollar Shipments By Package Category
• Figure 16. Structured ASIC Worldwide Merchant Market Dollar Shipments By Functional Classification
• Figure 17. Structured ASIC Mixed-Signal Percent Analog Content